RF-WM-3235B1

RF-WM-3235B1(S) 是信驰达科技推出的一款完全兼容TI 官方CC3235MODSF/S 的嵌入式2.4 GHz & 5GHz 双频Wi-Fi 模块,该模块采用TI Simple-Link Wi-Fi CC3235SF/S 芯片设计,内置高性能ARM Cortex-M4处理器,包含多种外设,如:并行摄像头接口、I2S、 SD、UART、SPI、I2C、ADC和GPIO。模块支持IEEE 802.11 a/b/g/n 无线标准,支持Station、AP 和Wi-Fi 直连模式;支持个人和企业级别的WPA2 加密方式,支持TCP/IP 和TLS/SSL stacks。

  • 核心方案: CC3235SF
  • 支持协议: IEEE 802.11 b/g/n
  • 发射功率: +18dBm@2.4GHz(1 DSSS) +18.1dBm@5GHz(6 OFDM)
  • 通信距离: 100m
  • 核心优势: 双频Wi-Fi 低功耗 5G

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实测功耗

从不以理论值代替实际值宣传

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双频Wi-Fi

双频物联网Wi-Fi模块

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原厂可替换

可直接替换原厂CC3235MODS CC3235MODSF

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支持低功耗

优化后可以将Wi-Fi节点的续航提升至12个月

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实测距离

在天气情况 空旷可视 距地约为2米的郊区进行测试

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高低温

能够适应各种恶劣环境

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宽电压

更宽的电压适用范围

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应用场景

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引脚图

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脚位

名称

功能

备注

Pin1

GND

-

Ground

Pin2

GND

-

Ground

Pin3

GPIO10

I/O

GPIO

Pin4

GPIO11

I/O

GPIO

Pin5

GPIO14

I/O

GPIO

Pin6

GPIO15

I/O

GPIO

Pin7

GPIO16

I/O

GPIO

Pin8

GPIO17

I/O

GPIO

Pin9

GPIO12

I/O

GPIO

Pin10

GPIO13

I/O

GPIO

Pin11

GPIO22

I/O

GPIO

Pin12

JTAG_TDI

I/O

JTAG TDI input. Leave unconnected if not used on product

Pin13

FLASH_SPI_MISO

I

External Serial Flash Programming: SPI data in

Pin14

FLASH_SPI_nCS_IN

I

External Serial Flash Programming: SPI chip select (active low)

Pin15

FLASH_SPI_CLK

I

External Serial Flash Programming: SPI clock

Pin16

GND

-

Ground

Pin17

FLASH_SPI_MOSI

O

External Serial Flash Programming: SPI data out

Pin18

JTAG_TDO

I/O

JTAG TDO output. Leave unconnected if not used on product

Pin19

GPIO28

I/O

GPIO

Pin20

NC

-

-

Pin21

JTAG_TCK

I/O

JTAG TCK input. Leave unconnected if not used on product.(2)
An internal 100 k
Ω pull down resistor is tied to this pin.

Pin22

JTAG_TMS

-

JTAG TMS input. Leave unconnected if not used on product.

Pin23

SOP2

-

An internal 100 kΩ pull down resistor is tied to this SOP pin. An
external 10 kΩ resistor is required to pull this pin high. See
Section 6.11.1 for SOP[2:0] configuration modes.

Pin24

SOP1

-

An internal 100 kΩ pull down resistor is tied to this SOP pin. An
external 10 kΩ resistor is required to pull this pin high. See
Section 6.11.1 for SOP[2:0] configuration modes.

Pin25

GND

-

Ground

Pin26

GND

-

Ground

Pin27

GND

-

Ground

Pin28

GND

-

Ground

Pin29

GND

-

Ground

Pin30

GND

-

Ground

Pin31

RF_ABG

I/O

Ground

Pin32

GND

-

Ground

Pin33

NC

-

-

Pin34

SOP0

 

An internal 100 kΩ pull down resistor is tied to this SOP pin. An
external 10 kΩ resistor is required to pull this pin high. See
Section 6.11.1 for SOP[2:0] configuration modes.

Pin35

nRESET

I

There is an internal, 100 kΩ, pull-up resistor option from the
nRESET pin to VBAT_RESET. Note: VBAT_RESET is not
connected to VBAT1 or VBAT2 within the module. The following
connection schemes are recommended:
• Connect nRESET to a switch, external controller, or host,
only if nRESET will be in a defined state under all operating
conditions. Leave VBAT_RESET unconnected to save
power.
• If nRESET cannot be in a defined state under all operating
conditions, connect VBAT_RESET to the main module
power supply (VBAT1 and VBAT2). Due to the internal pullup
resistor a leakage current of 3.3 V / 100 kΩ is expected.

Pin36

VBAT_RESET

-

Pin37

VBAT1

Power

Power supply for the module, must be connected to battery (2.3
V to 3.6 V)

Pin38

GND

-

Ground

Pin39

NC

-

-

Pin40

VBAT2

Power

Power supply for the module, must be connected to battery (2.3
V to 3.6 V)

Pin41

NC

-

-

Pin42

GPIO30

 

GPIO

Pin43

GND

 

Ground

Pin44

GPIO30

  

Pin45

NC

-

-

Pin46

GPIO1

I/O

GPIO

Pin47

GPIO2

I/O

GPIO

Pin48

GPIO3

I/O

GPIO

Pin49

GPIO4

I/O

GPIO

Pin50

GPIO5

I/O

GPIO

Pin51

GPIO6

I/O

GPIO

Pin52

GPIO7

I/O

GPIO

Pin53

GPIO8

I/O

GPIO

Pin54

GPIO9

I/O

GPIO

Pin55

GND

-

Thermal ground

Pin56

GND

-

Thermal ground

Pin57

GND

-

Thermal ground

Pin58

GND

-

Thermal ground

Pin59

GND

-

Thermal ground

Pin60

GND

-

Thermal ground

Pin61

GND

-

Thermal ground

Pin62

GND

-

Thermal ground

Pin63

GND

-

Thermal ground


设计·仿真

良好的性能来源于全局仿真介入

真正的好产品 都是“精打细算”设计而出强大的设计能力才能做出好产品

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设计·天线

天线是通信系统关键环节

好的天线是通信系统稳定的核心竞争力

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实力认证

九年技术积累 领跑无线行业

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机械尺寸

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引脚定义

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脚位

名称

功能

备注­­

Pin1

GND

-

Ground

Pin2

GND

-

Ground

Pin3

GPIO10

I/O

GPIO

Pin4

GPIO11

I/O

GPIO

Pin5

GPIO14

I/O

GPIO

Pin6

GPIO15

I/O

GPIO

Pin7

GPIO16

I/O

GPIO

Pin8

GPIO17

I/O

GPIO

Pin9

GPIO12

I/O

GPIO

Pin10

GPIO13

I/O

GPIO

Pin11

GPIO22

I/O

GPIO

Pin12

JTAG_TDI

I/O

JTAG TDI input. Leave unconnected if not used on product

Pin13

FLASH_SPI_MISO

I

External Serial Flash Programming: SPI data in

Pin14

FLASH_SPI_nCS_IN

I

External Serial Flash Programming: SPI chip select (active low)

Pin15

FLASH_SPI_CLK

I

External Serial Flash Programming: SPI clock

Pin16

GND

-

Ground

Pin17

FLASH_SPI_MOSI

O

External Serial Flash Programming: SPI data out

Pin18

JTAG_TDO

I/O

JTAG TDO output. Leave unconnected if not used on product

Pin19

GPIO28

I/O

GPIO

Pin20

NC

-

-

Pin21

JTAG_TCK

I/O

JTAG TCK input. Leave unconnected if not used on product.(2)
An internal 100 k
Ω pull down resistor is tied to this pin.

Pin22

JTAG_TMS

-

JTAG TMS input. Leave unconnected if not used on product.

Pin23

SOP2

-

An internal 100 kΩ pull down resistor is tied to this SOP pin. An
external 10 kΩ resistor is required to pull this pin high. See
Section 6.11.1 for SOP[2:0] configuration modes.

Pin24

SOP1

-

An internal 100 kΩ pull down resistor is tied to this SOP pin. An
external 10 kΩ resistor is required to pull this pin high. See
Section 6.11.1 for SOP[2:0] configuration modes.

Pin25

GND

-

Ground

Pin26

GND

-

Ground

Pin27

GND

-

Ground

Pin28

GND

-

Ground

Pin29

GND

-

Ground

Pin30

GND

-

Ground

Pin31

RF_ABG

I/O

Ground

Pin32

GND

-

Ground

Pin33

NC

-

-

Pin34

SOP0


An internal 100 kΩ pull down resistor is tied to this SOP pin. An
external 10 kΩ resistor is required to pull this pin high. See
Section 6.11.1 for SOP[2:0] configuration modes.

Pin35

nRESET

I

There is an internal, 100 kΩ, pull-up resistor option from the
nRESET pin to VBAT_RESET. Note: VBAT_RESET is not
connected to VBAT1 or VBAT2 within the module. The following
connection schemes are recommended:
• Connect nRESET to a switch, external controller, or host,
only if nRESET will be in a defined state under all operating
conditions. Leave VBAT_RESET unconnected to save
power.
• If nRESET cannot be in a defined state under all operating
conditions, connect VBAT_RESET to the main module
power supply (VBAT1 and VBAT2). Due to the internal pullup
resistor a leakage current of 3.3 V / 100 kΩ is expected.

Pin36

VBAT_RESET

-

Pin37

VBAT1

Power

Power supply for the module, must be connected to battery (2.3
V to 3.6 V)

Pin38

GND

-

Ground

Pin39

NC

-

-

Pin40

VBAT2

Power

Power supply for the module, must be connected to battery (2.3
V to 3.6 V)

Pin41

NC

-

-

Pin42

GPIO30


GPIO

Pin43

GND


Ground

Pin44

GPIO30



Pin45

NC

-

-

Pin46

GPIO1

I/O

GPIO

Pin47

GPIO2

I/O

GPIO

Pin48

GPIO3

I/O

GPIO

Pin49

GPIO4

I/O

GPIO

Pin50

GPIO5

I/O

GPIO

Pin51

GPIO6

I/O

GPIO

Pin52

GPIO7

I/O

GPIO

Pin53

GPIO8

I/O

GPIO

Pin54

GPIO9

I/O

GPIO

Pin55

GND

-

Thermal ground

Pin56

GND

-

Thermal ground

Pin57

GND

-

Thermal ground

Pin58

GND

-

Thermal ground

Pin59

GND

-

Thermal ground

Pin60

GND

-

Thermal ground

Pin61

GND

-

Thermal ground

Pin62

GND

-

Thermal ground

Pin63

GND

-

Thermal ground


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